2020 Summit Workshops

Wednesday, August 19, 2020

MTO 101 and ERI Panel
2:15 - 5:45 PM
Dr. Mark Rosker, DARPA
Dr. Dev Palmer, DARPA
Select ERI Program Managers

During MTO 101, Office leadership will provide information on the Microsystems Technology Office (MTO) and its ongoing and desired research priorities. The session - which will be repeated on Thursday August 20 - will also include valuable information on how best to engage with MTO and to seek research funding. The MTO 101 session will be immediately followed by a live, interactive panel featuring MTO Leadership and several MTO program managers (PMs). The PMs will share current and potential research areas from outside of the ERI portfolio, with topics that may include management of the radiofrequency spectrum and positioning, navigation, and timing. DARPA Leadership and PMs will conclude the session by taking questions from participants.
Heterogeneous 3D Microsystems - Increased Functional Density for Next Generation RF Sensors
2:15 - 5:45 PM
Dr. Tom Kazior, Raytheon

To continue performing diverse missions in increasingly crowded electromagnetic (EM) environments, future sensor and communication systems will require increased bandwidth and sensitivity as well as enhanced functionality per unit area. These needs are driving sensor arrays toward 3D solutions, particularly at millimeter wave and THz frequencies. This workshop builds on last year's HI workshop and focuses on the 3D stacking of RF, analog/mixed signal, and digital functions. The workshop features speakers from government, academia, commercial industry, and the defense industrial base. The workshop concludes with a discussion on the unique 3DHI challenges for RF/mixed signal applications and suggestions for potential paths forward.
Heterogeneous 3D Microsystems - Opportunities for Photonics: Emerging Computing Concepts and Architectures
2:15 - 5:45 PM
Dr. Gordon Keeler, DARPA

This workshop will explore both short- and long-term insertion opportunities for integrated photonics technologies in computing systems that leverage innovation under the DARPA PIPES and LUMOS programs. The PIPES program is realizing co-packaged optical interconnect technologies with low energy and latency. The workshop begins by considering new transition opportunities in existing and emerging computing architectures (HPC, AI/ML, data center) for PIPES technologies. The LUMOS program seeks to enhance silicon photonics by incorporating on-chip gain and non-linearities in an accessible, flexible advanced foundry process. Such technologies are likely to enable new photonics applications for information processing systems. The workshop considers the possibilities for the LUMOS technologies for advanced electronic/photonic platforms, neuromorphic optical computing, and quantum information systems.
Autonomy and Processing - Technologies and Non-Volatile Memory for Multifunctional Memory and Computing
2:15 - 5:45 PM
Dr. Ron Polcawich, DARPA
Dr. Y.K. Chen, DARPA
Dr. Ali Keshavarzi, Stanford University

The workshop gathers thought leaders to discuss current state-of-the-art and the industrial roadmaps to probe into promising new technology approaches for the next-generation of multifunctional memory. A range of speakers will identify possible unique DoD applications enabled by technologies and device structures to take advantage of dense low write-energy and multi-bit non-volatile memory (NVM) capability for next-generation memory-enhanced data-centric computing.
Security and Access - Creating a Resilient and Robust Microelectronics Pipeline
2:15 - 5:45 PM
Dr. Matt Casto, Office of the Under Secretary of Defense for Research and Engineering (OUSD(R&E))

Description Forthcoming
Security and Access - Access to State of the Art Microelectronics with Quantifiable Assurance
2:15 - 5:45 PM
Dr. Morgan Thoma, Office of the Under Secretary of Defense for Research and Engineering (OUSD(R&E))
Dr. Brian Dupaix, Air Force Research Lab (AFRL)

Description Forthcoming

Thursday, August 20, 2020

MTO 101 and ERI Panel
2:15 - 5:45 PM
Dr. Mark Rosker, DARPA
Dr. Dev Palmer, DARPA
Select ERI Program Managers

During MTO 101, Office leadership will provide information on the Microsystems Technology Office (MTO) and its ongoing and desired research priorities. The session - which repeats content from Wednesday August 19 - will also include valuable information on how best to engage with MTO and to seek research funding. The MTO 101 session will be immediately followed by a live, interactive panel featuring MTO Leadership and several MTO program managers (PMs). The PMs will specifically discuss work within the ERI portfolio, concluding the session by taking questions from participants.
Heterogeneous 3D Microsystems - Reinventing Moore's Law through Desktop Manufacturing
2:15 - 5:45 PM
Dr. Tim Hancock, DARPA
Dr. Ron Polcawich, DARPA

Moore's Law is defined by smaller transistors on bigger wafers to reduce the cost per transistor with the assumption that non-recurring cost is completely amortized away over the lifetime of a product. While the DoD has enjoyed the performance enhancement that smaller transistors have brought, the defense applications and other small volume, niche applications do not fit within these boundary conditions and would benefit from a different cost model where recurring cost was higher and production volumes much lower. This workshop will explore desktop manufacturing techniques that could apply device scaling in small volumes and to a broader set of devices than just digital CMOS. The workshop will begin by introducing and defining the problem, followed by several invited speakers from the field discussing XYZ. The session will conclude with a program manager-led panel to brainstorm next steps and areas for potential investment.
Cybersecurity - Simplifying the Development of Provably Secure Multilevel Security Architectures
2:15 - 5:45 PM
Mr. Walter Weiss, DARPA

This interactive workshop introduces novel language extensions and software co-design tools developed under the DARPA Guaranteed Architecture for Physical Security (GAPS) program to revolutionize the development of cross-domain systems that are correct-by-construction with provable security guarantees. Attendees of this workshop will use GAPS development and emulation tools to express cross-domain security constraints within example applications and evaluate the results on an emulator modelling multiple security enclaves. Attendees will also learn about novel GAPS hardware in progress for further enforcing guards on the cross-domain boundary.
Joint University Microelectronics Program (JUMP)
2:15 - 5:45 PM
Dr. Todd Younkin, Semiconductor Research Corporation (SRC)

The JUMP program co-funds U.S. universities with 12 major semiconductor, computing, and aerospace companies to undertake high-risk, high-payoff research that addresses existing and emerging challenges in microelectronic technologies. This JUMP program workshop aims to provide an overview of the six research centers under the JUMP program and selected technical highlights.
Security and Access - Addressing DoD Unique Microelectronic Needs
2:15 - 3:45 PM
Dr. Matt Kay, Naval Surface Warfare Center (NSWC) Crane

Description Forthcoming
Microelectronics Research and Capabilities across the DOE Laboratory Complex
4:00 - 5:45 PM
Dr. Andrew Schwartz, Department of Energy Office of Science

This workshop will be designed as a broad survey intended to educate ERI researchers about the diverse expertise and capabilities available at the DOE National Labs. Information will be provided about open access scientific user facilities; active research programs in advanced microelectronics; and state-of-the-art synthesis, fabrication, characterization, and modeling tools. As appropriate, guidance will be presented for attendees to access DOE Lab capabilities or explore the possibilities of collaborative research on topics of mutual interest.
Security and Access - Access to Advanced Packaging and Test
4:00 - 5:45 PM
Mr. Brett Hamilton, Naval Surface Warfare Center (NSWC) Crane

Description Forthcoming

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