5G and Future RF
- DSSoC: Development of Next Gen Processors for RF Systems DASH - SoC (Heterogeneous SoC)
- HyDDENN: DARPA HyDREA: Hyperdimensional computing: Robust, Efficient & Accurate
- M3IC: Integrated Magnetics in mmWave Systems
- M3IC: Integrated Magnetics in mmWave Systems (DEMO)
- M3IC: Compact, Physics based Model for Nonlinear RF Magnetics encompassing EM and Spin Waves
- PEACH: Deep Delay Loop Reservoir Computing
Artificial Intelligence
- FRANC: EigenArch: A Low Rank Hardware Machine Learning Accelerator
- FRANC: Stochastic Dataflow Computing
- L2M: Lifelong Learning Using Eigentasks
- MOABB: Integrated Optical Phased Array LiDAR
- MOABB: Integrated Optical Phased Array LiDAR (DEMO)
- MOABB: AI-Enabled Vision-Cued LIDAR for Small Unmanned Vehicles
- SDH: Transmuter: A Reconfigurable Computer
- SDH: Transmuter: A Reconfigurable Computer (DEMO)
- SDH: Princeton SDH DECADES Architecture
- SPiNN: Neural Network Enhanced Surveillance Radar
Heterogeneous 3D
- FFE: Fiber Platform for Flexible Sensing Arrays
- MGM: Progress Towards a 40nm GaN Foundry
- CHIPS/PIPES: Photonic Chiplets for Tb/s Chip-to-Chip I/O
- CHIPS/PIPES: Photonic Chiplets for Tb/s Chip-to-Chip I/O (DEMO)
- PIPES: Silicon Photonic Super-Switch
- PIPES: Energy Efficient Electrical and Optical Co-packaged Transceiver for Large Scale In-package Optical IO
- INNOVATE: Aligned Carbon: Nanotubes for Integrated Circuits
Security and Access
- FRANC: A Robust True Random Number Generator Using Voltage-Controlled MTJ in 65nm CMOS
- OMG: Hardware Redaction via Fine-Grained eFPGA
- SSITH: CHERI: Capability Hardware Enhanced RISC Instructions
- SSITH: CHERI: Capability Hardware Enhanced RISC Instructions (DEMO)
- INNOVATE: Inchfab: A Democratized Microfabrication Internet
- OpenROAD: Unleashing Hardware Innovation (DEMO)
- ALIGN: Analog Layout, Intelligently Generated from Netlists (DEMO)
- LSOracle: Forward Looking Logic Synthesis (DEMO)
- OpenFPGA: A Key to Agile Prototyping Customizable FPGAs (DEMO)
- The Xyce Analog Circuit Simulator (DEMO)
- AMPSE: An Analog and Mixed-Signal Circuit Optimization Engine (DEMO)
- Automated Asynchronous Digital VLSI (DEMO)
- FETT Voter Registration (DEMO)
Trusted and Assured Microelectronics
- SHIELD: Supply Chain Integrity for Electronics Defense
- AMARO: Automated Microelectronics Analysis and Reports Optimization Tool
- Risk Assessment and Metrics
- Risk Assessment and Metrics (DEMO)
- Rad-Hard Microelectronics: Demonstration of Strategic Rad-Hard 90-nm FDSOI CMOS Process
- SHIP: Additive Manufacturing for Advanced Packaging
- N-polar GaN on SiC and Sapphire Epitaxy for High Performance RF and Mm-wave Electronics: From R&D to Commercial Production Platforms
- Ultra-Low-Loss Passive Photonic IC Platform for Sensors
- Strategic Radiation-Hardened Electronics Council (SRHEC)
- Access to Advanced Packaging and Test
- From Silicon to Simulation: A Full End-to-End Decomposition of a Fabricated 130 nm Serial Peripheral Interface for Establishing a Hardware Assurance Baseline Root-of-Trust (DEMO)
- IC Decomposition and Imaging Metrics to Optimize Design File Recovery for Verification and Validation (DEMO)
- Design Assurance (DEMO)
- Novel Pulsed-Laser Testing Approach for Predicting Radiation Effects in Microelectronics (DEMO)
- Technical Development: Aether Spy (DEMO)